Products

Load Board: Final Test

There are two major tests for semiconductors and generally divided into 2 stages: CP (Chip Probing or Circuit Probing) and FT (Final Test) aims at the testing of the packed IC. After being packed, IC requires another round of inspection to control the yield rate and quality of the chips for assurance the function and speed of the chips conforming to the design requirement. This is also the stage for sorting out nonconforming chips to save the cost of production at the later stage.

Load Board: Load Board

Load Board is a high accuracy customized PCB and a transmission key fixture between IC and ATE (Automatic Test Equipment). The increasing sophistication of IC dictated over time dictated for more work on testing and IC verification, which in turn dictated for better design and quality of the Load Board. In the design of load board, Keystone Microtech made use of SI (Signal Integrity), and PI (Power Integrity) simulation to optimize and improve the design of load board. The layout of the load board will be refined to meet the demand of individual customer for the simulation data to meet the specification. Keystone Microtech has a lot of experience in the design of load board for decades, and plenty knowledge base of various ATE platforms. In addition, Keystone Microtech has also created the data base, guideline for different test platforms to enhance NPI (New Product Introduction) of customers and condense the design lead-time.

System Level Test: System Level Test (SLT)

The evolution of the process nodes in semiconductor manufacturing, echoed with the stacking up of computing power and run speed of the chips made the design of chips even more sophisticated. Accordingly, the density of transistor increased significantly. The focus of chip designer will be the sorting out of defects and controlling yield rate to avoid the delivery of nonconforming items to the customers thus far. For this reason, full-range and system level method to test the design of chip emerged as one form of chip testing in the industry. SLT can simulates the terminal application of the product, and test the yield rate of chips through running program. This method can help to rectify the problem of inadequacy of the Coverage Rate under CP and FT.

Keystone Microtech started the research and development of the SLT of load board with the customers since 2022, and is well-experienced in mass production.